An integrated Asymmetric Digital Subscriber Line (ADSL) line driver is designed to transmit high-power (e.g., 25 kHz-2.2 MHz) Discrete Multi-Tone (DMT) signals into a transformer-coupled 100-ohm line. Despite the mitigating effect of the transformer ratio, the voltage swing at the chip-side coil typically exceeds the reliability limits of core devices in a scaled CMOS process. Even input/output (I/O) devices may not be able to handle the peak voltage when the transmitted and terminated DMT signals combine constructively, let alone the high voltages associated with fault conditions, such as shorting the output to the supply. For example, a line driver designed in a 1.8V/3.3V CMOS process whose output stage runs off a 5V supply, must support a differential output swing of 4 Vpp. To prevent high stress that accelerates aging and may precipitate premature fatigue, or worse, catastrophic damage to the part, transistors in the critical region of the output stage must be protected against over-voltage conditions. Such protection circuits should consume minimal chip resources (including area and power), while not interfering with mission-mode operation of the line driver.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such approaches with some aspects of the present method and apparatus set forth in the remainder of this disclosure with reference to the drawings.